1. Field of the Invention
The present invention pertains to the plasma etching of silicon substrates. The method of the invention is generally applicable to the etching of silicon, but is particularly useful in the etching of deep trenches. A typical deep trench would have a diameter of about 0.15 xcexcm (or larger) and an aspect ratio as high as about 35:1. Silicon deep trench etching is most commonly used in capacitor technology and in particular in DRAM applications. Other potential applications for the present etching method include the etching of shallow trenches (currently having a typical feature size of about 0.25 xcexcm to about 0.4 xcexcm and an aspect ratio of about 1.1 to 2:1) used in applications such as device isolation; the etching of polysilicon gates; and, the etching of silicide layers. In addition, the present etching method is useful for the micro machining of silicon surfaces for biomedical applications, for example. The present method of plasma etching may be used in combination with dielectric, photoresist, and metal masking materials
2. Brief Description of the Background Art
Although the silicon etching method of the present invention is useful in a number of applications, as mentioned above, one of the most important applications is the etching of high aspect ratio (over about 20:1) trench capacitors used in DRAM applications. The profile of the etched trench must meet strictly defined industry standards. The current specification for a 256 Mb DRAM capacitor having a critical diameter ranging from about 0.15 to about 0.38 xcexcm calls for strict profile taper control. A schematic showing a representative trench structure 100 is presented in FIG. 1. Trench structure 100 includes a silicon substrate 102, a dielectric pad oxide layer 104, a masking layer 106, and a patterning layer 108. Typically the dielectric pad oxide layer silicon dioxide, the masking layer is silicon nitride, and the patterning layer material is borosilicate glass (BSG) or a silicon oxide generated using tetraethyl orthosilicate (TEOS), or a combination thereof. In some applications, a dielectric Anti-Reflective Compound (ARC) layer such as siliconoxynitride may be used in combination with the patterning layer. The top portion 110 of the trench 103, which extends from the silicon surface 105 into the silicon substrate 102 a depth 114 of about 1.5 xcexcm is specified to taper at an angle of 88.5xc2x10.5xc2x0. In general, it is preferred that the angle range from about 87xc2x0 to about 89xc2x0. If the taper were lower, at an angle of 85xc2x0, for example, when the critical diameter of the trench is particularly small, for example 0.18 xcexcm, the opening can be closed off completely if the etch varies during processing. The bottom portion 112 of the trench 103, which extends beneath the top portion 110 for an additional depth 116 of about 6.5 xcexcm is specified to taper at an angle of 89.5xc2x10.5xc2x0. The bottom of the trench is preferably rounded, and this rounding occurs naturally when the process parameters are as described in the process of the present invention. The bottom portion 112 of the trench may be bottle shaped rather than tapered, as shown in FIG. 7.
The development of manufacturing technology for fabrication of the trench structure shown in FIG. 1 (and for silicon trench structures of the future) depends on development of a plasma etch technology which provides adequate selectivity for the silicon substrate over the patterning layer 108, the masking layer 106, and the dielectric layer 104, while providing an economically feasible etch rate for the silicon substrate layer 102, and, while enabling the profile control necessary to provide the tapers specified above. The plasma etch technology involves a number of materials and process variables.
Related U.S. patent application, Ser. No. 08/985,771, filed Dec. 5, 1997, assigned to the assignee of the present invention and hereby incorporated by reference in its entirety, describes a method for etching high aspect ratio trenches in silicon using a sequential, multistep etch. The plasma source gas composition for the first etch step includes HBr and O2 and may include a non-reactive nobel gas such as helium or argon. The plasma source gas composition for the second etch step includes a fluorine-containing gas, HBr and O2. Examples of gases which may be used to provide a source of fluorine in the second step include SiF4, Si2F6, NF3, or SF6, with SF6 being preferred. The first etch step is designed to provide passivation of the sidewalls, protecting the hardmask used for patterning the silicon and maintaining the desired, somewhat tapered, shape of the top of the patterned openings. The second step provides an anisotropic etch at high etch rates. The second etch step is also said to remove passivation material from the trench sidewalls, the etching substrate, and the chamber walls simultaneously.
Subsequent to the work which provided the subject matter disclosed in U.S. patent application, Ser. No. 08/985,771, applicants discovered that the particular fluorine-containing gas used in the second step is critical, not only in determining etch rate, but also with regard to profile control and the accumulation of deposits on the interior surfaces of the process chamber and various processing apparatus enclosed within the chamber. Further, applicants discovered that a single step process is adequate when a particular plasma source gas combination is used.
The present invention pertains to particular etch chemistry which enables silicon etching without mask erosion while providing an etched surface which is free of debris. Using this etch chemistry in combination with processing parameters such as etch chamber pressure, plasma (source) generation power, substrate bias power, and substrate temperature, for example, provides a plasma etch capability meeting silicon deep trench etch requirements. The processing parameters of the kind mentioned above can be provided by equipment known in the art, such as the Silicon Etch DPS (Decoupled Plasma Source) CENTURA(copyright) etch system available from Applied Materials, Inc. of Santa Clara, Calif.
The present invention pertains to an etch chemistry useful for the etching of silicon surfaces. Although the method may be used for applications such as trench isolation and micro machining, it is particularly useful in the deep trench etching of silicon where profile control is particularly important. In the case of deep trench etching, at least a portion of the silicon trench, particularly toward the bottom of the trench, is etched using a combination of reactive gases including fluorine-containing compound which does not contain silicon (FC); a silicon-containing compound (SC), which preferably also contains fluorine; and oxygen (O2). When the SC is a fluorine-containing silicon compound, the volumetric ratio of the FC to SC ranges from about 25:1 to about 1:10, and the volumetric ratio of the O2 to SC ranges from about 10:1 to about 1:10. When the SC is a non-fluorine-containing silicon compound, the volumetric ratio of the FC to SC ranges from about 100:1 to about 1:10, with the volumetric ratio of the O2 to SC ranges from about 10:1 to about 1:10; and, preferably the volumetric ratio of the FC to SC ranges from about 38:1 to about 1:7.
The FC compound may be selected, for example but not by way of limitation, from the following: F2O, F2O2, NF3, NOF, NO2F, SF6, SF4, S2F2, S2F10, CF4, CH2F2, CHF3, and CH3F. The most preferred FC is SF6.
When the SC contains fluorine, the SC may be selected, for example but not by way of limitation, from the following: SiF4, Si2F6, SiHF3, SiH2F2, SiH3F, Si2OF6, SiCl2F2, and SiClF3. The most preferred fluorine-containing SC is SiF4. When the SC does not contain fluorine, the SC may be selected from silicon-containing compounds such as SiBr4, SiHBr3, SiH2Br2, SiH3Br, SiCl4, SiHCl3, SiH2Cl2, SiH3Cl, Si2Cl6, SiH4, Si2H6, Si3H8, Si4H10, SiHI2, SiH2I, C4H12Si, and Si(C2H3O2)4, by way of example, and not by way of limitation. The use of a fluorine-containing silicon compound is preferred as a means of improving the etch rate and removing debris from the etched surfaces, while providing supplemental silicon availability for protection (passivation) of the etched mask sidewall and the upper etched portion of the trench, during etching of the bottom portion of the trench. The non-fluorine-containing source of silicon is preferred when the desired trench profile requires additional protection of the etched mask sidewall and the etched surface at the top of the trench during etching the bottom portion of the trench.
Non-reactive diluent gases, typically noble gases such as helium and argon may be used in combination with the reactive gases to assist in etch profile control. The amount of diluent gas used depends on other process variables such as, but not limited to, the desired process pressure, the silicon-comprising substrate temperature, the amount of plasma source power applied to create and maintain the etch plasma, and the amount of bias power applied to the silicon substrate.
Optionally, other reactant halogen-containing gases may be added in limited amounts to further assist in etch profile control. By way of example and not by limitation, bromine-containing compounds such as HBr, CH3Br, CH2Br2, may be used, wherein the volumetric ratio of FC to the bromine-containing compound ranges from about 100:1 to about 1:100; preferably the volumetric ratio of FC to the bromine-containing compound is about 10:1 to about 1:10. The preferred bromine-containing compound is HBr. It is possible to use chlorine-containing compounds similar to the bromine-containing compounds listed above for profile control, but the bromine-containing compounds are more preferred.
The ratio of FC:SC, combined with the ratio of SC:O2 ensures proper selectivity toward silicon over adjacent layers of material such as silicon dioxide-comprising hard mask material and silicon nitride masking layer, while simultaneously ensuring a rapid etch rate for the silicon.
The etch chemistry described above may be used to deep etch the entire silicon trench. In the alternative, a different etch chemistry, such as those previously known in the art of silicon trench etching, may be used to etch the portion of the silicon trench toward the top of the trench while the new etch chemistry described above is used to etch the bottom portion of the trench. For example, a combination of etchant gases including HBr, O2, and He may be used to etch the upper portion of the trench, where the etch profile is particularly critical, with a combination of etchant gases including SiF4, SF6, O2, and HBr being used to etch the lower portion of the trench. Further, the lower portion of the trench may be etched with SiF4, SF6 and O2 only (without HBr).
Although the etch process is a clean process, particularly when SF6 is used as the primary etchant, it may be desired to use a cleaning step when the process is operated in a deposition mode. A deposition mode takes place when a particularly high concentration of the SC compound is used and/or a particularly high plasma source power (which increases the amount of dissociation) is used, with a result that a silicon-containing material deposits on available surfaces. For the kinds of plasma gas feeds described herein, the silicon-containing material typically comprises silicon, bromine, and oxygen. In the interest of keeping the etch process chamber cleaner, the SC gas flow may be turned off at some time during the etch process, preferably after the etching of the upper portion of the trench and after passivation of the silicon nitride masking layer. More preferably, the SC gas flow is turned off toward the end of the trench etching so that debris is cleaned off the surface of the etched trench as well as off of process chamber walls. In the alternative, the ratio of FC:SC gas may be increased as the etching progresses toward the bottom of the trench.
Using the method of the present invention, including the etch chemistry described above, it is possible to protect pattern masking layers from both lateral erosion and from upper surface etching by operating the etch process under conditions which provide for the deposition of silicon oxide during etch, while simultaneously providing an excellent etch rate for the silicon trench itself. Further, the amount of silicon oxide deposition can be tuned in a manner to obtain the desired profile (physical dimensions) for the deep etched trench.